CDR (Clock and Data Recovery) for recovering data and a clock from a received signal is adopted in high-speed interfaces or the like included in semiconductor devices.
For example, the following two methods are used for testing a receiver circuit having a CDR function.
One method is as follows. A tester supplies a test pattern to a receiver circuit and a BIST (Built-In Self Test) circuit included in the receiver circuit determines whether or not the test pattern is held correctly.
The other method is as follows. A transmitter circuit which generates and transmits a test pattern is placed in the same chip where a receiver circuit is placed or outside a chip where a receiver circuit is placed (on an evaluation board, for example). The transmitter circuit and the receiver circuit are connected outside the chip and a loop back test is performed.
With these method, however, a receiver circuit is merely tested under a specific jitter condition realized by a circuit which generates a test pattern. That is to say, a test (jitter tolerance test) for measuring resistance to various jitter characteristics is not performed.
Japanese Laid-open Patent Publication No. 2005-164440
Japanese Laid-open Patent Publication No. 2005-311564
A tester may be used for generating a test pattern having an arbitrary jitter characteristic. In that case, however, the accuracy of a test deteriorates due to loss in a transmission line in the tester or on an evaluation board, impedance mismatch, a measurement error, or the like.